Use an analog-filter network to create realistic-looking digital signals.
The analog-filter network in Figure 1 converts each input step into a smooth, Gaussian-shaped rising and falling edge. When simulating high-speed systems in Spice, you can use this filter network instead of single-segment PWL (piecewise-linear) edge-shaping because it better represents how real signals behave.
The analog filter comes from Anatol I Zverev's Handbook of Filter Synthesis, a classic compendium of passive-filter designs (Reference 1). The book lists circuits for implementing many types of filters, including approximations of the Gaussian filter. The approximation is not exact because an actual, perfect, Gaussian response would have an infinitely long precursor. The author derives the filter approximation as a 10th-order truncation of the Taylor series expansion for the square of a perfect Gaussian-network function. He assumes ideal components with no significant parasitic effects.
Zverev specifies a current-source driver for the filter and shunts the current source with resistor R0. Figure 1 drives the circuit differently. It uses a voltage source that connects in series with R0. Either approach produces a driver with an output impedance of R0. Using a voltage source makes it easy to determine the circuit's output amplitude: it will be precisely half the amplitude of the voltage source.
The circuit values in Figure 1 differ from the original circuit values in Zverev's book, which Table 1 lists as "Original Values". Zverev originally designed his circuit for drive and load impedances of 1Ω, an inconveniently low value. You can scale the impedance of Zverev's original filter to a new value R simply by multiplying all the filter's resistances and inductances by R and dividing the capacitances by R. Using that method, Figure 1 adjusts the assumed drive and load impedances to R=50 ohms.
|After adjustment for 50 ohms
|After adjustment for 50 ohms and 100 psec
The 3-dB frequency of Zverev's original circuit equals 1 rad/sec, or 0.159154 Hz, making a 10 to 90% rise/fall time of 2.12773 seconds. You can scale the filter to any new rise time T simply by multiplying all the capacitor and inductor values by the ratio T/(2.12773). This time-scaling operation leaves the resistor values unchanged. Figure 1 scales the filter to a 100-psec rise time by multiplying all the capacitor and inductor values by the ratio (100 psec)/(2.12773).
The combination of impedance- and time-scaling operations in Figure 1 produces a 50Ω filter with a 100-psec rise and fall time. The filter tracks true Gaussian behavior down to –40 dB within ±1 dB, with a slope of 60 dB per octave after that (Figure 2). The nominal delay of the 10-pole model, from zero to 50, is 1.485 times the 10 to 90% rise time. Remember this delay when making your timing calculations. You'll see it in the Spice model.
Always follow Zverev's filter with a buffer. In Spice terminology, a perfect buffer is a VCVS (voltage-controlled voltage source). The buffer prevents any attached loads from changing the filter's performance. Connect your driver's source-resistance and package models to the output of the buffer.
 Anatol I Zverev, Handbook of Filter Synthesis, John Wiley & Sons, New York, 1967