I have a query regarding return currents as follows....
If a driver output switches low, then the current (electron flow) will flow out of the pin--through the load (either active or passive)--then through the power pin of the load IC--back to the power pin of the driver. Right?
But the above mentioned is the actual total current flow at the DC level. At the AC level [the] transient currents are [flowing] through parasitic capacitances. Right?
Thanks for your interest in high-speed digital design.
Two small corrections:
(1) When the driver switches HI the return current (transient and DC) must re-enter the driver through its power pin. When the driver switches LO the return current must re-enter the driver through its ground pin.
(2) Imagine the printed circuit board (PCB) trace connected to the output pin as a succession of tiny elemental transmission-line sections. Each section has some series inductance, and also some parallel capacitance. The capacitances exist (mostly) between the output trace and the nearest solid plane layer. When a gate switches HI, current exits the driver pin and begins to charge the capacitance of the first elemental section of the transmission line. As the signal edge propagates down the trace, the capacitance of each section of the trace is successively charged. As the capacitance of each section of trace is charged, current is flowing down the line, charging that one little section, and then returning, along the solid plane, to the driver. The buildup of current in the signal and return paths is simultaneous as the wavefront progresses down the line (i.e., the current does NOT go to the end on the signal trace and then find its way back). As soon as the signal current hits the end of the trace, a corresponding full amount of return current, flowing mostly on the solid plane nearest to the outbound trace, has already been established.
Near the driver, if the nearest solid plane happens to be the power plane, the returning signal current may simply re-enter the driver's power pin (remember we are driving HI).
If, on the other hand, the nearest solid plane happens to be a ground plane (i.e., the trace was routed adjacent to a ground plane layer), something different happens. In that case the return current must somewhere traverse a bypass capacitor to get from the ground plane (where it wants to flow) to the power plane (from which it may re-enter the driver's power pin). This action happens at a bypass capacitor located (hopefully) near the driver. That, by the way, is a primary function of bypass capacitors: to help returning signal current get from (a) whatever plane happens to be adjacent to your trace, to (b) the appropriate power or ground pins of the chip.
As time proceeds, the signal current (and simultaneous buildup of return current) is penetrating further and further down the signal trace. This differential effect (the pairing of signal current and return current) propagates along the trace until it arrives at the load, at which time current begins to flow through the load. If the load is a resistive load which matches the impedance of the line the effect stabilizes, with current continuously going from driver, through the line, through the load, and back to the driver. If the load is not matched to the line, a reflection happens. The reflection sends a second wavefront (another pairing of signal and return-current effects) back towards the driver.
The flow of return current does not depend on the existence of any load at the end of the line. During the first round-trip time, the magnitude of the return current is determined entirely by the properties of the transmission line, independent of the load.
Dr. Howard Johnson