I have received a number of interesting emails in response to my last newsletter on ECL and PECL. Here are some of the best. Thanks to everyone who responded!
Dr. Howard Johnson
In response to Sang Cheol Lee's question regarding ECL/PECL interfacing, I suggest reading the following referenced application notes from Motorola. AN1406 - Designing with PECL AN1568 - Interfacing between LVDS and ECL
Getting a copy of databook DL140 "High Performance ECL Data" may also be helpful; it includes these application notes (among others).
Regarding ECL/PECL circuits. I am using a variation of the 100k example that you outlined, but for scoping and ease of termination (which you didn't mention in the example), I chose +2.0 (Vcc) and - 2.5v (Vee). This gives a Vterm of 0v or ground, and now the output can be sent directly to the scope without using a bias tee network for termination.
I would suggest using a dual-supply differential ECL/PECL translator such as the 100EL90 (triple). It's reasonably fast (500 ps), and low skew (200 ps part-to-part). Mfrs: Motorola, Synergy.
Synergy's data sheet is at: http://www.micrel.com Search for archived product:SY100EL90V The alternative of having a DC offset on one of the grounds is much less appealing, as I imagine it would complicate grounding and shielding considerably.
Two comments on the latest newsletter:
"The ECL logic family was originally intended to be used with power supply voltages of 0 V and - 5.2 V."
Yes, but 100K ECL (which is what the questioner needs to work with) uses -4.5V. And slightly different logic levels (but close enough).
"If the data has equal numbers of ones and zeroes (for example, with a Manchester-ceded data sequence) then the level translation may be accomplished by sending the signal through a pair of DC-blocking capacitors (0.1 uF capacitors), and then re-biasing the receiver to its mid-range level. Other than this simple case, there is no good, simple way to accomplish the re-biasing."
Motorola has some ECL/PECL translator ICs. Check out the MC100EL90 and MC100LVEL90. I think they do exactly what Sang Cheol Lee wants.
I haven't tried this, but it should be possible to use a 5.0V zener diode to do the ECL-to-PECL translation, though at some risk due to tolerances (in the single- ended case). For a differential signal, a matched pair of zeners might do the trick. Of course it would also need some current sources (constant current diodes?), and good pull- downs on the output side to sink the zener diode currents.
We are at the phase of my program where engineers are rolling off (i.e., Formal System Test). My primary high-speed designer rolled off a few months ago but I'd like to provide general feedback regarding Sang Cheol Lee's questions.
There is a fair amount of information out there regarding ECL to TTL translators. The leaders of the pack are obviously Motorola, National Semiconductor, Synergy Semiconductor, etc. If these aren't enough, checkout Arizona MicroTek et. al. Instead of limiting the search to ECL-to-TTL translators, Sang may consider options such as ECL- to-PECL translators followed by PECL-to-TTL translators. The search engines on the web are great venues for feedback and links to vendors' web- sites/data books/email.
Sang left out some important information concerning his design such as transmission rates, power allocations, cost, size, etc. There is a wealth of DC-DC converters to help Sang get past the hurdle of different supplies if required. On our job, we chose +48 Vdc as our primary voltage source and perform DC-DC conversion on each 9U-Size card as required. This has worked out great since we gain isolation advantage. In my opinion, Sang needs to be more concerned with layout and timing analysis if he is dealing with any bandwidth (i.e., he needs to start breathing pico-seconds). If its low-ho-hum bandwidth, then no-brainer. Almost any approach should work.
If bandwidth is an issue, Sang needs to understand transmission theory and termination techniques regarding ECL/PECL before he gets in over his head.