## Why Is That?

Another fun summer vacation has come to a close here at the ranch. The kids have started school (my oldest is driving now) and I'm looking forward to getting back to work. I'll be teaching for the first time a public class in Rochester, NY in just a few weeks, followed by a visit to Silicon Valley. I look forward to meeting many of you at these classes, and hearing about your ideas and projects.

Making good measurements, and interpreting those measurements, are important parts of the daily life of every signal-integrity expert. If you plan to succeed in that field you need three things: Good measurement equipment with adequate bandwidth for your application, a simulation system that can handle the range of applications you plan to tackle, and knowledge of what factors might reasonably affect your design. I teach the knowledge part.

The following discussion is a kind of "open-book test". I hope it helps bolster your knowledge of transmission line effects.  It presents many tidbits of knowledge about lab technique, gleaned from long experience doing such things.

Each time I say "Why", see if you can guess the reason before I reveal the answer.

This article presents measurements and practical issues closely related to the theory presented in my earlier article, "What's That Glitch?"

## Why Is That?

The simple, source-terminated circuit in Figure 1 illustrates several facts relevant to transmission line analysis. I rigged up this example so I could quickly change the conditions of loading at the end of a short transmission line.

The driver is a Texas Instruments DL10044T differential LVDS-style buffer. It has a differential output impedance of approximately 100 ohms. Into an open circuit it generates a differential signal of 1200 mV p-p with 200 ps rise/fall times.

Why did I choose 200 ps?

Because I'm planning to use hand-soldered ceramic radial 10 pF capacitors for loads. Any faster, and the hand-soldered capacitive load would not work correctly. Any slower, and you, the reader, might lose interest.

The output traces fan out to SMA connectors. I set a LeCroy D600A-AT 7.5 GHz differential probe onto the microstrip traces at a point near the driver outputs, about 3/4 inch distant from the signal via that leads to each SMA connector.

Why did I choose 3/4 inch?

A distance of 3/4 inch makes a one-way delay, in FR-4, of about 120 ps, and a roundtrip-delay of 240 ps, just a tad longer than the risetime. I should therefore just be able to make out some interesting reflection effects at the SMA connector.

Why did I choose the LeCroy probe?

Because I know it has more than adequate bandwidth and a differential input capacitance on the order of 0.16 pF. It will have negligible effect on the circuit under test.

While sending a slow square wave through the apparatus, I can now screw in one of several different SMA fittings to the output. The three fittings I made up for this discussion are:

(1) An open circuit. The "open" includes a length of dielectric material and center conductor inside an SMA barrel.

Why not just leave the SMA female fitting unconnected?

The length of dielectric material in my "open" matches that in the other configurations. That minimizes the extraneous differences between the open circuit condition and my other two conditions. You may have noticed that network analyzers and other fine equipment often include "open circuit" fittings in their calibration kits. The lengths of these fittings are always carefully matched to the "short circuit" fittings.

(2) A capacitive load. A 10-pF ceramic radial capacitor is soldered to the end of the SMA barrel with the leads as short as practical. The two 10-pF capacitors working in series together make a 5-pF differential load.

Why do I keep the capacitor leads kept short?

Short leads minimize the equivalent series inductance (ESL) of the capacitor. As soldered, the ESL is about 3 nH (as low as you can get with this kind of component). Together with 10 pF, that ESL makes a self-resonant time constant of sqrt(LC)=173 ps.  At our rise/fall time of 200 ps, I expect this device will act mostly as a capacitor, with just a mild inductive bump at the front end of the response.

(3) A transmission-line load. Each 50-ohm RG316 coaxial cable is 24 in. long. Each is left un-terminated (open-circuited) at its far end.

Why are the coaxial cables left un-terminated?

So the DC (long-term) response matches the other loads. Also, my LVDS driver cannot drive 50 ohms to ground.

If I had needed a damped termination for this setup I would have sent the coaxial signals through DC blocking capacitors into 50-ohm coaxial terminations. For a simple square-wave (DC-balanced) stimulation, that would have worked as well as a true 100-ohm purely differential termination.

In each case, I apply duplicate loads to both sides of the differential setup. This arrangement demonstrates beautifully the effect of a capacitive load and at the same time provides a rich matrix of practical difficulties to promote good discussion.

The measured responses to all three conditions appear in Figure 2. The first waveform, (purple, marked "SMA"), shows the effect of an open circuit. The second (blue, marked "Cap.") shows the capacitive load. The third, (green, marked "Kink") plots the response to my coaxial RG-316 transmission-line load.

Focus first on the open-circuit response marked "SMA". The initial event is a half-size rising edge. Then, after one full roundtrip delay comes the second half-size rising edge, bringing the signal up to a full level. The spacing between edges is half a division, roughly 500 ps, corresponding to a delay of 250 ps each way. Yet, the length of trace from the probe to the SMA input via is only 3/4 in. long, amounting to a delay of only 120 ps (assuming 160 ps/in. for the microstrips).

Why the discrepancy?

The actual roundtrip delay includes the delay internal to the SMA connector itself. The signal path length of the SMA fitting, from via to the open-circuited endpoint, is 1.00 inch -- longer than the whole trace leading up to it. That often happens. Connectors are huge, compared to traces. Never forget to include internal connector delays in your calculations.

After accounting for the 120-ps delay of the PCB trace, the remaining delay internal to the SMA fitting (from via to open-circuited endpoint) must be 250-120=130 ps. At a length of one inch, that corresponds to an effective dielectric constant of 2.4, a believable number for an SMA fitting.

Why 2.4?

Delay varies with the square root of dielectric constant. At a relative dielectric constant of 1.00, you get a delay of 85 ps/in (free space). At any other dielectric constant Ek, the relation works like this:

delay (ps/in.) = 85 * sqrt(Ek)

In the second waveform (blue), you the big capacitive reflection shows up as a negative glitch returning from the end of the line (the glitch is marked "Cap.").

Why is it negative?

In the short term, a perfect capacitor looks like a dead short circuit and thus generates a reflection coefficient of –1. In the long term, the capacitor has no effect, returning in that case a reflection coefficient of +1 (open circuit). The time it takes to go from one state to the other depends on the impedance driving the capacitor (50 ohms) times the value of capacitance (10 pF). That time constant, for this system, is 500 ps. It takes a of couple time constants for the signal to rise to the 90% level.

In the third waveform (green), you see the first edge, and then not much else. Only little reflections follow that. Eventually, the signal bounces off the far end of the coaxial cable and returns, but that happens off-screen, way to the right of this display.

The little reflections reveal a lot. First, there is a tiny kink in the waveform at the highlighted spot in the figure. You can see it in all three waveforms. The spot occurs about 250 ps (roundtrip) after the main edge, placing it physically right at the entrance to the SMA. That is the excess capacitance of the SMA signal via. Enlarging the clearance around this via would eliminate this kink.

Why would enlarging the clearance help?

Enlarging the ground clearance region around a via moves the grounded metal further away from the signal path, reducing the parasitic capacitance of the via to ground. With that change, the signal would transition smoothly and without pause up to the level of the first bump.

After the tiny kink, the following positive bump represents the impedance created by the dielectric material stuffed inside the barrel section of the SMA male fitting. Apparently, the coaxial dielectric sleeve fits loosely within the connector barrel. That creates a too-large impedance in this section (about 60 ohms). The duration of the 60-ohm region is approximately 100 ps (3/4 in. at Ek=2.5).

Why didn't the coaxial cable fit the connector?

Every coaxial cable is different. Good-quality connectors are made for exact, specific coaxial dimensions. If you need superior performance, only use the connector with the cables for which it is designed.

One more feature I'd like to show you, but since it doesn't show clearly in Figure 1 I'm going to show it to you a different way. After messing with any circuit I like to build a simulation. When the simulation produces the same waveform (at least as regards the major features) as my actual measurements, I feel I have developed a better understanding of how the circuit works.

One advantage of simulation is that, once you get it working, you can easily change it. I can stretch out the simulated system, adding perfect lengths of imaginary transmission lines between the sections, separating their effects.  Figure 3 adds two new sections of 3-inches to the diagram.

When I run the simulation, the long sections disentangle the reflections so you can observe the individual effects (Figure 4). For example, the small positive wrinkle right before the capacitor's negative glitch shows the equivalent series inductance (ESL) of the capacitor. In the absence of any ESL, the waveform would plummet more steeply to an even lower level. If you use only the size of the negative glitch as a way to characterize the severity of a capacitive glitch, the ESL effect can partially mask the value of capacitance.

What's the small glitch following the capacitive effect, right before the word, "open"?

I don't know. Maybe you'll figure that one out for me…  What I like about this kind of work is all the fascinating little details.

Once your simulation is built, it can show you what the signal looks like at the far end, inside a receiver or package at a place where you may not be able to make real-world measurements. That's a key benefit of combining real-world measurement with simulation.

Best Regards,
Dr. Howard Johnson