The broadside-coupled layout in Figure 1 includes two traces, A and B, that begin on the surface layer of the pc board. They then pass through layer 2 into a broadside-coupled stripline configuration on layers 3 and 4. The plane-stitching via X resides 4 mm from signal via Y. The return current for trace A (dotted line) therefore has to divert 4 mm out of its way to find the plane-stitching via, plus another 4 mm to get back, giving a total estimated additional delay of (4 mm)×2×(4 psec/mm)=56 psec. If this same asymmetry exists at both ends of the broadside configuration, the total additional delay on trace A equals 112 psec.
This crude estimate doesn't perfectly model what happens, because a true estimate involves both the capacitance and the inductance of the via configuration. However, if an intrapair skew number anywhere near 100 psec matters to you, then either place the plane-stitching vias closer to the signal vias or don't use a broadside configuration.
In addition to imbalances in the return paths possibly causing asymmetry, the broadside configuration falls prey to any differences between the ac voltages on the two planes. Because the trace on layer 3 couples more heavily to the top plane and the trace on layer 4 to the bottom plane, any differences in the voltages on these two planes induce a differential signal on the two traces. When using the broadside configuration, it pays to use the same power-supply voltage on both planes and nail them together with numerous vias on a tight grid. I like to use whatever plane voltage delivers the best common-mode noise rejection at the receiver (usually the ground plane).
If you use different power-supply voltages on the two planes, all the power-supply noise between them couples directly into the differential broadside-coupled configuration. In the side-by-side configuration, both traces naturally couple equally to the same nearby plane, so differential pickup of power-supply noise doesn't happen.
Broadside-coupled traces suffer from the dielectric layer-thickness tolerances on the layers separating the traces from their respective solid planes. For example, in a design with 5-mil separation from each trace to its respective plane, a layer-thickness tolerance of ±1 mil might result in one trace being 4 mils away and the other 6 mils away from the reference planes. This arrangement impairs your ability to achieve good symmetry between the traces, which is the whole purpose of using a differential configuration. Edge-coupled traces, because they are etched at the same time, under the same conditions, on the same layer, with the same layer thickness, are generally more symmetric.
The mechanical registration tolerance of the two signal layers (3 and 4 in Figure 1) affects the impedance of a broadside-coupled trace.
The one possible area in which broadside-coupled traces have any advantage over edge-coupled traces is routing density. For example, if you need to interleave a large bus through a succession of connector-pin fields on a large backplane, the broadside configuration requires only single-track routing between pins, whereas an edge-coupled configuration might require double-track routing between pins to achieve the same layout density. The broadside configuration is also somewhat easier to lay out by hand, because both traces go everywhere together (except at the launch and recovery sites). In general, avoid broadside-coupled traces unless routing considerations make them necessary.
EDN takes this excerpt from the forthcoming Prentice Hall publication, High Speed Signal Propagation, by Howard Johnson, ISBN 013084408X, February 2003. Adapted by permission of Pearson Education Inc, Upper Saddle River, NJ.